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Timer Module

Jan 23, 2017

Timer is running one of the basic elements of communication protocol, mainly for the mandates of the various timing and frame retransmissions. Communication protocols are implemented on the single-chip computer system you are using timers, time accuracy is not high, but relatively large quantity requirements. Because of limited hardware resources, it is impossible for every single task is assigned a hardware timer, only a single hardware timer emulation of multiple software timer method, to meet the needs of application timing agreements.

Certain data structures to organize these timers, and provides a unified interface, known as the "timer". The current timer there are 2 different methods:

① method of static array. Timer nodes are stored in an array. Advantages of simple logic, take up less ROM. But this solution has obvious drawbacks: when the hardware timer interrupt occurs, the subtraction operation to all nodes of the timer, time is very expensive, and delay not determined (number of timer).

Table II Delta chains. The timing values in ascending order according to the timer, form a linked list. A timer timing value is after all previous timer value plus the value of the node. In this way, on every clock interrupt processing, just a subtraction operation on 1th timer node, greatly reducing time costs. However, the complex programme logic, ROM content, requiring frequent recycling memory allocated, prone to memory fragmentation.